# ZilionX Tiny Vision Encoder Simulation Verification

Updated 27 October 2026.

## Latest Result

A frozen trained two-layer toy vision encoder met its predeclared accuracy
and arithmetic-verification targets on a registered procedural evaluation.

| Paired image group | CPU correct | Integer reference correct | SDK/RTL correct |
|---|---:|---:|---:|
| Original | 64/64 | 64/64 | 64/64 |
| Relevant-patch flip | 64/64 | 64/64 | 64/64 |
| Distractor-patch flip | 64/64 | 64/64 | 64/64 |

All 192 final RTL outputs matched the integer reference byte-for-byte.
Three replay checks passed. Each group used one SDK process and one model load.

The batch comprises 64 base images and two paired interventions per image:
192 evaluations, not 192 independent samples. It uses the same procedural
generator family as development data, not an external vision benchmark.

## What Was Tested

- 4 x 4 RGB images represented as four 2 x 2 patches.
- Two trained encoder layers, hidden dimension 8 and FFN dimension 32.
- Four-head non-causal multi-head attention, dual pre-LayerNorm and GELU.
- Host-side patch embedding, position embedding, pooling and classification.
- Encoder execution through public SDK, simulated DMA and RTL simulation.

The task compares the brightness bits of the top-left and bottom-right
patches. Other patches act as distractors. Individual patch-bit/label counts
are balanced; this does not rule out every finite-sample shortcut.

The model and integer package were frozen before inference. Generation seed,
candidate hashes and targets were registered in advance. Exact-image overlap
was checked against the original dataset and three earlier registered batches.
This evaluation is closed to further tuning.

The simulator was reused from an earlier verified build. This evaluation
did not include a fresh RTL build or direct comparison of internal RTL
layer checkpoints.

## Supporting Development Evidence

An untrained encoder matrix covered 1, 2, 4 and 8 layers across three seeds,
with 84 exact final outputs and 12 successful replays.

The reproducible trained two-layer development workflow produced 128 exact
output checks and four replays, with 32/32 correct classifications per group.
Ordinary validation and original-counterfactual inputs overlap, so these
are not 128 distinct images.

Per-layer attention controls were evaluated on development images:

| Intervention | CPU correct | Integer reference correct |
|---|---:|---:|
| Layer 0 disabled | 16/32 | 16/32 |
| Layer 0 uniform | 30/32 | 29/32 |
| Layer 1 disabled | 23/32 | 25/32 |
| Layer 1 uniform | 32/32 | 32/32 |

These are post-training CPU/reference ablations, not RTL interventions or
separately trained baselines. Learned layer-1 routing was not necessary to
preserve these validation labels.

## Limitations And Earlier Failures

Earlier one-layer conversions lost predictions through clipping or scaling
errors. Diagnostic counterfactuals also exposed conversion regressions despite
perfect ordinary validation accuracy.

Three earlier one-layer registered paired evaluations each scored 191/192,
missing their predeclared perfect-accuracy target. In two cases, conversion
introduced a prediction regression; in the corrected-forward QAT case,
the remaining error was shared by CPU and integer models. RTL continued to
match the integer reference exactly.

Those failures remain part of the evidence. Different models and evaluation
batches do not establish a controlled superiority comparison.

## Scope

This is a tiny trained vision simulation milestone. It does not establish:

- Full-size or pretrained ViT compatibility.
- Real-world image accuracy or robustness.
- Drone or automotive deployment readiness.
- Safety certification.
- Physical FPGA operation, throughput, latency or power.

Byte-exact RTL agreement means agreement with the integer reference, not
numerical identity with the floating-point model.

The vision workflows are local engineering verification, not a new capability
of existing Developer Portal jobs.

## Evidence

Evaluation tooling checkpoint: `2c24ea3`. Supporting development runner:
`f7f24e7`; the development run recorded source `4b60648` before that runner
was committed.

Detailed registration, checkpoint, reference/RTL outputs and simulator evidence
are retained privately. Matching archive checksum verification was reported
on Ubuntu and Mac. This summary is not an independent audit or certification.

[Public machine-readable summary](/verification/vision-2026-10-27.json)
 · [Development progress](/progress)